For this analysis i just used the given java script and get the following result that are shown in figure.
Here First graph shows the Extracted Vales of the Ramp signal While other show INL & DNL.
In graph Green one is ideal value while blue line shows the extracted values opf the signal.
I have find ideal ADC and DAC curve same So the INL & DNL must be Zero.
ADC Histogram Test for Ramp
For this analysis I again used the same java script and get the following result that are shown in figure.
In Histogram test I increase the number of steps and see how many time the code digit will come at ADC Output.
In Graph for each steps of Ramp signal INL & DNL is again Zero.
INL & DNL Analysis of DAC for Sine
Again form the given Java script I find the DNL & INL of DAC.
Here First graph shows the INL & DNL of the Sine signal.
In graph Green shows INL while Blue shows DNL Value.
2nd graph showns Extracted values of the integer.
FFt Data Analysis of DAC for Sine
FFT webpage By using this web page I analysis the FFT accourding to your given instruction.
Here First graph shows the INL & DNL of the Sine signal.
In 1st graph it shows simple sine wave form.
2nd graph shows the FFT analysis of the sine signal and get a limited number.
3rd graph shows INL & DNL.ALl values of INL is zero because of missing code.
4th graph shows the histogram valuse which is expected to be Zero but its not. May be it is error on Java script.
Schematic & Simulation of R2R DAC
The schematic shows a 4Bit DAC
By changing the values of Resistors I simulate a Ramp test as well as Sine.
I find the INL & DNL values and discuss in next slides.


Simulation of R2R DAC for Sine Signal
1st graph shows the FFT behaviour of the R2R .
2nd graph shows the histogram test and we see the value are not zero,its shows error in INL & DNL values.
Simulation of R2R DAC for Ramp Signal
The graph on left hand shows the extracted values of the Ramp signal .
The graph ob Right hand shows the INL & DNL values of the Ramp signal.
INL shows big jump at higher order bit while 2 lower jumps at least bit of the signal.
Summary
 1st I Analysis the 4Bit ADC & DAC for Sine as well as for the Ramp signal.
 By observing the analysis of schematic, I understand how conversion can take place in Analog & Digital Signal.
 I leared how to find the INL & DNL values of the signal, through these value I also able to find the SNR.
 I also learned the FFT and histogram test of the ADC
 I also used R2R circuit and again observed the behavior of 4Bit ADC & DAC.
 I also Learned how to make web Report.
     