Hochschule Kempten      
Fakultät Elektrotechnik      
Elektronik       Fachgebiet Elektronik, Prof. Vollrath      

Charge Pump

03.02.2023 Joerg Vollrath

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Figure: Negative voltage Charge Pump

Figure: Negative voltage Charge Pump

Figure: Voltage Doubling Charge Pump

CD4007



Power transistor:
PFET, NFET FDG6320C
NFET: 2 G, 6 D, 1 S
PFET: 5 G, 3 D, 4 S


 - Ladungspumpe: Elek3/23/Charge.asc negative: ChargeN.asc
    With CD4007 and 2x PFET, NFET FDG6320C as inverter and pump parallel to one leg
	Current limit via frequency, charge pump + längsregler, 
	Wire list:
	* Pin1 pin5
	* Pin1 C1 AWG2 orange phi1
	* Pin2 Pin11 SCOPE3 R1,C2 nach Masse out?
	* Pin3 Pin12 
	* Pin12 C3 AWG1 SCOPE1 orange phi2
	* Pin4 VP+ in
	* Pin5 Pin10
	* Pin6 Open? G1 vp+
	* Pin7 GND
	* Pin8 open DN1 GND
	* Pin9 VP+ in
	* Pin11 P13 out yellow
    * pin14 OUT (Highest potential)(VPP ringing)
	* pin13	OUT 
2 FDG6320C wire list
Inverter and one transfer gate.
FDG6320C transfer gate
* pin1 Vin NFET Source
* pin2 pin5 NFET Gate, PFET gate
* pin2 CD4007 pin3 G2
* pin3 PFET Drain pin6 NFET Drain
* pin3 PFET Drain CD4007 pin5 DN2, pin1 DP2
* pin4 PFET source Vout CD4007 14
FDG6320C Inverter
* pin1 GND
* pin2 NFETG pin5 PFETG Capacitance CD4007 pin3   
* pin3 PFETD pin6 NFETD InvOut Capacitance CD4007 pin1
	Leistung Charge.asc 
	 In: V(in)*I(VIN)+V(phi1)*I(V1)+V(phi2)*I(V2) AVG(40..60ms)=5mW
	 Out: V(out)*I(R1) AVG(40..60ms)= 4.3 mW
	 Wirkungsgrad: 4.3/5 = 86%
	 KP faktor 10 grösser: 4.5764mW/8.2927mW = 55%
	 1k 20.64mW/33mW = 60%  overlap 18.76/31.3
	 transient 10u instead of 100u: 21.7/34
	 KP faktor 10, 1k:  39.1mW/47mW = 83%
	 Ladungspumpen-Baustein LM2775
	 n = Vout * Iout/Vdd/Iout = ((N+1)*VDD - N*Iout/f/C)*Iout/VDD/(N+1)/Iout
	 ***************************************************************************
	 ***** Vout = (N+1) VDD - N IL T / C
     ***************************************************************************
	 ***** n = 1 - N*Iout*Iout/f/C/VDD/(N+1)/Iout = 1 - N/(N+1)*Iout/f/C/VDD ??
     ***************************************************************************
	 Schalter zwischen C1 und C2 Vin Iin Vout Iout Frequenz f
	 

Measurement

C1, C2 10 uF
f = 200 kHz; T = 5 us
Vin = Vpp = VDD = 3.3 V
Cout = 33 nF

RLoad = 100 Ohm
Voutmin = 3.17 V, Voutmax = 3.87 V
I(Vpp) = 82 mA
Iout = 3.6 V / 100 Ohm = 36 mA

RLoad = 1 kOhm
Voutmin = 5.99 V, Voutmax = 6.47 V
I(Vpp) = 13 mA
Iout = 6.3 V / 1 kOhm = 6.3 mA

RLoad = 10 kOhm
Voutmin = 6.56 V, Voutmax = 6.64 V
I(Vpp) = 2 mA
Iout = 6.3 V / 10 kOhm = 0.66 mA

Negative voltage :
pin14 CD4007 bulk pfet vpp (formerly pin13)
pin13,11,2 gnd (formerly out)
pin9,6,4 SN2,SN3 (G1) OUT (formerly Vin VPP)
Pin7 OUT most negative potential (formerly gnd)
Transfer gate P1 -> CD4007 pin9 out

Verification works!!
100 Ohm ringing, instable. Increase Cout from 33nF to 99 nF less ringing, less discharge
-20 mA


Figure: Circuit

Figure: Negative charge pump measurement RL = 1 kOhm


C1pump: Only CD4007
C2pump: CD4007 parallel FDG6320C
C3Load: output
R1Load:

Theory


When the phi2 goes from high (vin) to low (gnd, 0 V), phi1 goes from low (gnd, 0 V) to high (vin), G2 goes from 0 V, gnd to -Vin, G1 goes from -Vin to gnd.

During half a period the charge (C3+C2) * (-Vin) is discharged via R1Load.
ILoad = Vin/Rload
Ripple: dV = I * t / C = Vin/Rload * Tpump/2 /(C3+C2)

FDG6320C measurement


Table: Negative charge pump: -3.3 V

fpumpTpumpC1pumpC2pumpVmaxVminC3LoadRLoadILoad
200 kHz5 us10 uF10 uF-1.9 V-2.37 V100 nF100 Ohm22 mA
200 kHz5 us10 uF10 uF-2.23 V-2.25 V10 uF100 Ohm22 mA

FDG6320C has at 3.3V Vin an RDSon = 50 Ohm to make 3.3 V to 2.25 V at RLoad 100 Ohm
Imax = 2.25/100 A = 22mA
Iin = 28 mA
dV = I * T / C = 22 mA * 2.5 us/ 100 nF = 0.5 V

VDD= 3 V; f= 10kHz; C= 10uF (106); FDG6320C
f= 10kHz; R_L = 10kOhm; Voutavg=-2.9V; dV=0.120V
f= 100kHz; R_L = 10kOhm; Voutavg=-2.9V; dV=0.030V
f= 100kHz; R_L = 1kOhm; Voutavg=-2.9V; dV=0.300V
f= 1MHz; R_L = 1kOhm; Voutavg=-2.85V; dV=0.040V; IR= 3mA; IVP+=10mA
f= 1MHz; R_L = 100Ohm; Voutavg=-2V; dV=0.300V; IR= 20mA; IVP+=24mA

With 100 Ohm a lot of ringing is present. 1 MHz is a good operating frequency.
Up to 3 mA can be delivered.

Measurement CD4007 Vout=-3V

VDD= 3 V; f= 200kHz; C= 10uF (106); CD4007
R_L = 1kOhm; Voutavg=-0.64V
R_L = 10kOhm; Voutavg=-2.4V; Iout = Voutavg/R_L= 240 uA
R_L = 100kOhm; Voutavg=-2.93; Iout = Voutavg/R_L= 29 uA
f=500Hz; R_L = 10kOhm; Voutavg=-2.4V
f=1MHz; R_L = 10kOhm; Voutavg=-2.36V
f=100Hz; R_L = 10kOhm; Voutavg=-2.24V; dVout=0.1V
f=200Hz; R_L = 10kOhm; Voutavg=-2.36V; dVout=0.05V
f=500Hz; R_L = 10kOhm; Voutavg=-2.4V; dVout=0.02V
Starting from 1 kHz the output voltage is stable limited

CD4007 at VDD=Vin=3V with C = 10uF (106) gives a maximum of 30..200uA current with a ripple Vout < 20 mV starting with f=1 kHz.

PCB Build


A PCB like a breadboard for NFETPFET MCMNP2065A-TP and FDG6320C was designed.

Pelliconi Charge pump LTSPICE simulation


A 5-stage circuit in 0.18 um TSMC technology/LTSPICE model for 1.8 V operated at 100 MHz was built.

Measurement 1:
Pin = -1.1272 mW, 330 uW, -2 mW
Pout = 724uW, 102 uW, 1.2 mW
Iout = 85 uA, 10 uA, 173 uA
RLoad = 100 k, 1000 k, 40 k
CLoad = 30 pF
Vout = 8.5 V, 10.1 V, 6.9 V
tup = 2..3us
neff= 64%, 31%, 60%
Measurement 2 10MHz Cy=2.5pF:
Pin = -521 uW, -237 uW
Pout = 165 uW, 74.3 uW
Iout = 40 uA, 8.6 uA
RLoad = 100k, 1000 k,
CLoad = 30 pF
Vout = 4.1 V, 8.6 V
tup =
neff= 31%, 31%
Measurement 3 10MHz Cy=25pF, Cy=100pF:
Pin = -1.18 mW, 1.23 mW
Pout = 813 uW, 928 uW
Iout = 90 uA, 96.36 uA
RLoad = 100k
CLoad = 30 pF
Vout = 9 V, 9.636 V
tup = 8 us
neff= 68%, 75% Measurement 4 100MHz Cy=100pF:
Pin = -1.26 mW
Pout = 937 uW
Iout = 96.8 uA
RLoad = 100k
CLoad = 30 pF
Vout = 9.68 V
tup = 8 us
neff=74%
Measurement 5 100MHz Cy=100pF M=10:
Pin = -1.68 mW
Pout = 1.14 mW
Iout = 105.5 uA
RLoad = 100k
CLoad = 30 pF
Vout = 10.55 V
tup = 8 us
neff=68%


Ideal LTSPICE


cap_eff.asc

.meas PV1 AVG -I(V1)*V(+V) FROM 3m to 5m
.meas PRL AVG I(RL)*V(c2) FROM 3m to 5m
.meas eff param PRL/PV1
.meas avg AVG V(c2) FROM 3m to 5m


Summary


NTZD3155CT2G, 0.7 Ohm, 1.8 V, IDS = 500 mA
MCMNP2065A-TP, 25 mOhm, 4.5 V, IDS = 4/6 A
Digikey lowest RDSon = 17 mOhm


References


Masterarbeit: Konzeption und Entwurf einer integrierten DC/DC Spannungsregelung für On-Chip Ladeschaltungen, Christoph Steffan, BSc C:\Users\vollratj\Documents\Vorlesung\EinzelVortraege\202209_EmbSysDataConverters\139069_steffan_christoph_2013_InfineonChargepump.pdf

[Doutreloigne 2010] Jan Doutreloigne. Fully integrated dickson charge pumps with opti- mized power ef?ciency. In WCECS 2010, October 20-22, 2010, San Francisco, USA [2010]. WCECS2010_pp811-817.pdf