Laboratory 1: Research: State of the Art Literature

Setting:


As a master student you want to build a discrete C2C digital to analog converter (DAC). You have already read some basic books about integrated AD and DA converters. Since books are already a couple of years old and circuit design is changing you want to research the more recent state of the art publications.
First you want to search for recent publications of data converters (ADC, DAC).
You want to identify properties of data converters: Resolution, frequency (sample rate), power consumption, architecture (principle), power supply voltage, input range and manufacturing feature size.

Then you want to search for publications of data converters (ADC, DAC) using C2C DAC topology.
You will use the IEEE website to do our search.
www.ieee.org
IEEE Xplore Digital Library: http://ieeexplore.ieee.org/Xplore/guesthome.jsp
The most important journal about circuit technology is the IEEE Journal of Solid-State Circuits.
Before you do a specific search you want to do a general search for analog digital or digital analog converters. You need search terms:
  1. Make a list of good search terms (5) either for AD or DA converters (You can do group work).
  2. How many articles do you get for each search term?
  3. How many articles do you get for the combination of 2 search terms?
  4. What options are available to reduce your search further?
  5. What kind of publications are available at IEEE Xplore Digital Library?

You want to select the publications of the last 3 years.
  1. How many publications are there?
The major publications in circuit design are published in the Journal of Solid-State Circuits (JSSC). Select this in your search.
  1. How many articles of Solid-State Circuits in 2017 deal with data converters?
  2. Make a table with 5 recent ADCs and 5 recent DACs and cite these articles like shown below.

Reso-
lution (Bits)		Sam-
ple rate [MHz]		 Power consumption
[W] 		Architecture, Technology
(Si, GaAs, SiGe;..) 		Power supply
voltage [V] 		ADC Input
range, DAC out-
put range		 Feature size [um] Chip size mm2 Typ: ADC, DAC Year Cita-
tion
4 35000 4.5 Flash, SiGe 3.3 NA 0.18 8 ADC 2009 [1]

[1] Shahramian, S.; Voinigescu, S.P.; Carusone, A.C., "A 35-GS/s, 4-Bit Flash ADC With Active Data and Clock Distribution Trees," Solid-State Circuits, IEEE Journal of , vol.44, no.6, pp.1709,1720, June 2009

Next you want to do a specific search for C2C data converters.
  1. How many recent publications do you find?
    You should list 2 publications.
    If there are not enough results in the JSSC broaden your search scope to other journals, conferences or to a longer time frame.
  2. Discuss your results.
    What could be the intended learning outcome for this laboratory?
    What were the challenges for you?
    How much time did you spent completing this laboratory?

Report


Make a report as a Word document or web page. There is a web page template available here.
Additional files are here as an zip file (39 MB).
Send a ziped group directory with your data containing also a printout of the webpage in a pdf file to joerg.vollrath@fh-kempten.de.

You can use the freeware program PDF Creator for generating the pdf file.

The directory should be named with the year, group number and last name

<year>_Group<###>_<Last_name>
Example: 2017_Group01_Vollrath

In this directory put the html and pdf file.
The file name should contain the date, the laboratory and your last names.

<year>_<month>_<Date>_InEl_Lab01_<Last_name1>_<Last_Name2>.pdf <year>_<month>_<Date>_InEl_Lab01_<Last_name1>_<Last_Name2>.html
Example: 2017_10_24_ InEl_Lab01_Vollrath_studentx.pdf
Example: 2017_10_24_ InEl_Lab01_Vollrath_studentx.html



Grading:


Each question should be answered. The answer should be correct/make sense. The submission date will be graded. Submission should happen until next week's laboratory. Late submission will be downgraded. A nice document format and correct use of English language and spelling is graded.