Interface Electronics

Interface electronics deals with data converters. Data converters are very interesting electronic systems combining digital, analog electronics and signal processing.
  • System perspective: Microcontrollers, FPGAs and ADC, DAC
  • ADC, DAC support circuits
  • ADC, DAC circuit architecture
  • ADC, DAC simulation, test and measurement
6.10.2025

1. Introduction
  • Analog versus digital, data converter systems
  • Data converter metrics:
    • N, Vref, Vfs, Vmax, LSB
Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap.28, p.932-940
📹 Video Introduction 7.10.2020
8.10.2025

2. LTSPICE
  • Installation and Operation
  • Behavioral models of AD converters and DA converters
Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap1, p.8-29
📹 Video LTSPICE 12.10.2020



13.10.2025

3. Static errors and measurement
  • INL, DNL, offset, gain error
  • INL, DNL example
  • INL, DNL histogram testing
Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap.28, p.932-964
📹 Video INL and DNL 14.10.2020
20.10.2025, 27.10.2025

4. Spectral Test
  • Quantization Error
  • Dynamic characteristic: spectrum analysis
    • Sampling
    • Aliasing
    • FFT, SNDR
Simulation of INL, DNL and spectrum analysis

Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap.28, p.953-957
📹 Laboratory 21.10.2020 Web report and ADC DAC simulation
📹 Lecture 23.10.2020 Spectral test

3.11.2025

5. DAC architecture

  • R string
  • Charge Scaling
  • Interpolating, segmented and split array architectures.
  • R2R and C2C architectures
Laboratory 1

Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap.29, p.965-984
📹 Lecture 26.10.2020 DAC architectures

10.11.2025

6. Errors in Practical Realization
  • Systematic Errors
  • Statistical Errors and Mismatch
  • Impact on INL and DNL
  • DAC Calibration
Laboratory 2

Reading:
Link:
📹 Lecture 28.10.2020 DAC errors


17.11.2025

7. DAC practical considerations

  • Settling time
  • Spurios signal coupling
  • Timing error
  • Reconstruction filter
  • Implementation Examples
Laboratory 3

Link:
📹 Lecture 2.11.2020 DAC practical considerations

24.11.2025

8. Analog to digital converters (ADC)


Sampling and Jitter
  • Sampling: Resistance, capacitance, jitter
  • Single slope and dual slope ADC
Laboratory 4

Reading:
📹 Lecture 4.11.2020 ADC Architectures, sampling, jitter


1.12.2025

9. Basic ADC Architectures

 Laboratory 5

Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap 29, p.985-1007
📹 Lecture 25.11.2020 Flash and SAR ADC

8.12.2025

10. Pipeline ADC start
  • Building blocks and simulation of a pipeline AD converter.
Laboratory 6

Reading:
CMOS: Circuit Design, Layout and Simulation, Baker, Chap 29, p.994-998
CMOS Analog Circuit Design, Allen, Holberg, Chap 10, p.612-729
📹 Video Pipeline ADC 16.12.2020


15.12.2025

11. Pipeline ADC details


Laboratory 7

Reading:
12.12.2025

12. Oversampling ADC

 Sigma delta ADC, PWM
  • Passive 1st order sigma delta ADC
    Simulation example
  • Active first order sigma delta ADC with decimation filter
  • Active second order sigma delta ADC with decimation filter
Laboratory 8

Reading:
📹 Lecture 1.12.2020 Sigma Delta ADC

12.1.2026

13. Advanced sigma delta ADC
Sigma delta ADC, PWM
  • MASH 2-1 sigma delta ADC with Decimation filter
Laboratory 9

Reading:
📹 Lecture 9.12.2020 Advanced Sigma Delta ADC

\( FOM = \frac {Power}{f_{sample} \cdot 2^{NBit}} \)
19.01.2026

14. Summary and Outlook

  • Figure of Merit for ADCs
  • Noise in data converters
  • Interfaces
Laboratory 11
Laboratory 12 and Summary

Reading:

Laboratory 2025


Students will do their reports as 1 page IEEE report.
There is a summary picture at the top as teaser, a title, date, author, institution and a very short precise summary of the results.
Starting with the abstract the 2 column report has an introduction, measurements, results and refeerences with numbered figures and tables like in the template.
On the second page is a picture and text concerning the background of the author.
Word example report

  1. Laboratory 1: LTSPICE and data converters
    Internet Copyright Form
    2. Word example report
  2. Laboratory 2: Simulating an R2R, RLadder DAC test setup
  3. Laboratory 3: Setting up the Arduino MKR WIFI 1010
    * Building and measuring a R2R DAC
    Link:
    📹 Lecture 18.11.2020 Laboratory review

    Optimize the setup for 1 channel DAC, ADC: (1) Maximum speed, (2) maximum resolution, (3) maximum performance (speed, resolution)
    Provide changes in program and/or changes in hardware.
    Provide evidence with measurements: Offset error, gain error, ramp INL and DNL, FFT SNR, SDR, INL and DNL
    Document your results.
DayGroupIdentifierDayGroupIdentifier
MoMo1***02 MR WedWed1***01 MT
Mo1***80 ZJWed1***22 LG
Mo2***26 SSWed2***02 SS
Mo2***11 SHWed2***46 TK
Mo3***03 TAWed3***38 LR
Mo3***80 GDWed3***51 HM
Mo4***00 KNWed4***63 PV
Mo4***35 TTWed4***50 RS
Mo5***02 IKWed5***08 LK
Mo5***96 JAWed5***97 HL
Mo6***14 HMWed6***03 UM
Mo6***63 RSWed6***26 MT
Mo7***92 AAWed7***76 BS
Mo7***19 RBWed7***45 EY
Mo8***40 BBWed8***34 VM
Mo8***39 PSWed8***76 AM
Mo9***07 LSWed9***15 AN
Mo9***20 DIWed9***89 DM
Mo10***86 SNWed10
Mo10 Wed10
Nr Date Group Date GroupRaum
01 14.10.2024 Mo 8:00 A 16.10.2024 Wed 14:00 BT314
02 21.10.2024 Mo 8:00 A 21.10.2024 Mo 15:45 BT314
03 28.10.2024 Mo 8:00 B 28.10.2024 Mo 15:45 AT314
04 4.11.2024 Mo 8:00 A 4.11.2024 Mo 15:45 BT314
05 11.11.2024 Mo 8:00 B 11.11.2024 Mo 15:45 AT314
06 18.11.2024 Mo 8:00 A 18.11.2024 Mo 15:45 BT314
07 25.11.2024 Mo 8:00 B 25.11.2024 Mo 15:45 AT314
08 02.12.2024 Mo 8:00 A 2.12.2024 Mo 15:45 BT314
09 9.12.2024 Mo 8:00 B 9.12.2024 Mo 15:45 AT314
10 16.12.2024 Mo 8:00 A 16.12.2024 Mo 15:45 BT314
11 13. 1.2025 Mo 8:00 B 13. 1.2025 Mo 15:45 AT314
12 20. 1.2025 Mo 8:00 A 20. 1.2025 Mo 15:45 BT314

Laboratories:


  1. 2012:
    Using LTSPICE and FFT for data converter analysis
    Create a 3-Bit Digital to Analog parallel charge scaling converter with LTSPICE.
    Design and simulate a sigma delta analog to digital converter
  2. 2013:
    1. Build a DAC
    2. Build a pipelined ADC and measure performance
  3. 2014:
    A charge coupling DAC
    Build a pipelined ADC and measure performance
  4. 2015:
    Building a successive approximation (SAR) ADC
  5. 2016:
    Building and measuring a sigma delta ADC
  6. 2017:
    Build a C2C DAC for a successive approximation (SAR) ADC
  7. 2018:
    1. Laboratory 1: Research: State of the art literature
    2. Laboratory 2: Research: State of the art commercial devices
    3. Laboratory 3: DA Converter SPICE model INL and DNL
    4. Laboratory 4: Measuring a R2R DAC
  8. 2020,2021:
    Investigation of ADC and DAC realized with Arduino MKR WIFI 1010
  9. 2022: ADC Precision Lab Investigations
    TI Precision Labs: ADCs
  10. 2023: ADC and DAC Investigations with Arduino MKR WIFI 1010
    Laboratory 4: Arduino MKR Wifi 1010 and DAC and ADC
  11. 2024: ADC and DAC Investigations with Arduino MKR WIFI 1010
    Laboratory 4: Setting up the Arduino MKR WIFI 1010
    * Building and measuring a R2R DAC

Laboratory 2019


Students will do their reports as Internet web sites.
Making of a web report

A basic setup of files are provided here as an zip file (39 MB).

  1. Guided laboratory 1,2: Webpage report, LTSPICE and data converters
  2. Laboratory 3: Simulating an ADC DAC test setup
  3. Laboratory 4: Simulating and measuring an R2R DAC
  4. Laboratory 05: A pipeline ADC
xxx910, A A00 Lab01,2
Lab03
Lab04 		xxx700, C E00 Lab03
Lab04 		xxx640, R M00 Lab01
Lab02
Lab03
Lab04
xxx726, P A01 xxx , E01 xxx , M01
xxx848, S B00 Lab03
Lab04 		xxx639, R H00 Lab01,2
Lab03
Lab04 		xxx, N00
xxx851, C B01 xxx426, W H01 xxx, N01
xxx136, H C00 Lab03
Lab04 		xxx600, K J00 Lab03
Lab04 		xxx , O00 Lab03
xxx742, K C01 xxx419, L J01 xxx, O01
xxx963, M D00 Lab03
Lab04 		xxx936, S L00 Lab03
Lab04 		xxx085, G P00 Lab03
Lab04
xxx877, S D01 xxx139, R L01 xxx777, T P01

Excercise:


Interface Electronics Problems

Overview of Practical Laboratories and Tools:


  1. Intro: ADC simulation of INL, DNL and spectrum analysis

  2. DAC simulation: DA Converter SPICE model INL and DNL

    Read LTSPICE raw file for data converter analysis.

    JavaScript ADC FFT histogram data analysis application with calibration

  3. DAC measurement: Measuring a 10-Bit C2C DA converter

    Digital signal generator

    Read oscilloscope data

  4. ADC simulation: Sigma Delta ADC simulation example

  5. Building a SAR, pipeline and sigma delta ADC
    Building a successive approximation (SAR) ADC
    Build a pipelined ADC and measure performance
    Building and measuring a sigma delta ADC

Duration: 22:23 min
Presentation of the Online Data Converter Framework


NodeEEBench


NodeEEBench is a a modular multiplatform project for an electronics laboratory equipment.
It will be used for the laboratory to measure INL, DNL and SNR.
NodeEEBench.zip can be unpacked in C:/temp on a windows PC and provides an waveform generator and oscilloscope interface for simulation, attached Arduino or BASYS3 FPGA.
This is work in progress.
Documentation EEBench
User interface NEEBench.html
The project is available at github JVollrath NodeEEBench.

References:

[1] Data Conversion Handbook (Analog Devices), Walter Kester PDF Documents
[2] CMOS: Circuit Design, Layout, and Simulation, Revised Second Edition, R. Jacob Baker, Wiley, ISBN 978-0-470-22941-5, Revised 2nd Edition, 2008
[3] CMOS: Mixed-Signal Circuit Design, Second Edition, Baker, Wiley 2009
www.cmosedu.com
[4] EE247 Analog-Digital Interface Integrated Circuits, Haideh Khorramabadi
Course Description and Material
[5] EE315B - VLSI Data Conversion Circuits, Murmann, Stanford
Murmann Web Page
Murmann Course material (pdf)
[6] P. E. Allen, D.R. Holberg, CMOS Analog IC Design, https://aicdesign.org/2016-short-course-notes-2/
[7] IEEE Standard 1241
IEEE Std 1241
[8] Data Converters, Franco Maloberti
Data Converters, Springer
[9] ECE 627 - Oversampled Delta-Sigma Data Converters, Oregon State University, Gabor C. Temes, Data Converters,
Exams available
[10] Analog-to-Digital Conversion, M. Pelgrom, second ed,. Springer,2013(optional)
[11] Bezhad Razavi,
215D, Spring, Data converter problems
UCLA pipelined ADC Simulator UPAS