Interface Electronics

Interface electronics deals with data converters. Data converters are very interesting electronic systems combining digital, analog electronics and signal processing.

1. 4.10.2021	Introduction Analog versus digital, data converter systems Data converter metrics: N, Vref, Vfs, Vmax, LSB Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap.28, p.932-940 📹 Video Introduction 7.10.2020		8. 15.11.2021	Analog to digital converters (ADC) Sampling and Jitter Sampling: Resistance, capacitance, jitter Single slope and dual slope ADC Laboratory 4 Reading: 📹 Lecture 4.11.2020 ADC Architectures, sampling, jitter 9.11.2020, 11.11.2020, 16.11.2020 Hardware distribution for laboratory
2. 4.10.2021	LTSPICE Installation and Operation Behavioral models of AD converters and DA converters Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap1, p.8-29 📹 Video LTSPICE 12.10.2020		9. 22.11.2021	Basic ADC Architectures Flash ADC Folding flash ADC Successive approximation (SAR) ADC Building a successive approximation (SAR) ADC Laboratory 5 Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap 29, p.985-1007 📹 Lecture 25.11.2020 Flash and SAR ADC
3. 11.10.2021	Static errors and measurement INL, DNL, offset, gain error INL, DNL example INL, DNL histogram testing Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap.28, p.932-964 📹 Video INL and DNL 14.10.2020		10. 29.11.2021	Pipeline ADC start Building blocks and simulation of a pipeline AD converter. Laboratory 6 Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap 29, p.994-998 Reading: CMOS Analog Circuit Design, Allen, Holberg, Chap 10, p.612-729 📹 Video Pipeline ADC 16.12.2020
4. 11.10.2021	Spectral Test Quantization Error Dynamic characteristic: spectrum analysis Sampling Aliasing FFT, SNDR Simulation of INL, DNL and spectrum analysis Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap.28, p.953-957 📹 Laboratory 21.10.2020 Web report and ADC DAC simulation 📹 Lecture 23.10.2020 Spectral test		11. 6.12.2021	Pipeline ADC details Building a pipeline AD converter for a laboratory Offset, gain and random errors of a pipeline AD converter. 1.5 Bits per stage pipeline ADC Calibration Laboratory 7 Reading:
5. 18.10.2021	DAC architecture R string Charge Scaling Interpolating, segmented and split array architectures. R2R and C2C architectures Laboratory 1 Reading: CMOS: Circuit Design, Layout and Simulation, Baker, Chap.29, p.965-984 📹 Lecture 26.10.2020 DAC architectures		12. 13.12.2021	Oversampling ADC Sigma delta ADC, PWM Passive 1st order sigma delta ADC Simulation example Active first order sigma delta ADC with decimation filter Active second order sigma delta ADC with decimation filter Laboratory 8 Reading: 📹 Lecture 1.12.2020 Sigma Delta ADC
6. 25.10.2021	Errors in Practical Realization Systematic Errors Statistical Errors and Mismatch Impact on INL and DNL DAC Calibration Laboratory 2 Reading: Link: 📹 Lecture 28.10.2020 DAC errors		13. 20.12.2021	Advanced sigma delta ADC Sigma delta ADC, PWM MASH 2-1 sigma delta ADC with Decimation filter Laboratory 9 Reading: 📹 Lecture 9.12.2020 Advanced Sigma Delta ADC
7. 8.11.2021	DAC practical considerations Settling time Spurios signal coupling Timing error Reconstruction filter Implementation Examples Laboratory 3 Link: 📹 Lecture 2.11.2020 DAC practical considerations		14. 10.1.2022	Summary and Outlook Figure of Merit for ADCs Noise in data converters Interfaces Laboratory 10 17.1.2022, 24.1.2022 Laboratory 11-14 and Summary Reading:	\( FOM = \frac {Power}{f_{sample} \cdot 2^{NBit}} \)

Laboratory 2021

Students will do their reports as 2 pages IEEE reports.

Guided laboratory 1,2: Webpage report, LTSPICE and data converters
Laboratory 3: Simulating an ADC DAC test setup
Internet Copyright Form
Laboratory 4: Setting up the Arduino MKR WIFI 1010
* Building and measuring a R2R DAC
Link:
📹 Lecture 18.11.2020 Laboratory review

Optimize the setup for 1 channel DAC, ADC: (1) Maximum speed, (2) maximum resolution, (3) maximum performance (speed, resolution)
Provide changes in program and/or changes in hardware.
Provide evidence with measurements: Offset error, gain error, ramp INL and DNL, FFT SNR, SDR, INL and DNL
Document your results as web page.

Laboratories:

2012:
Using LTSPICE and FFT for data converter analysis
Create a 3-Bit Digital to Analog parallel charge scaling converter with LTSPICE.
Design and simulate a sigma delta analog to digital converter
2013:
1. Build a DAC
2. Build a pipelined ADC and measure performance
2014:
A charge coupling DAC
Build a pipelined ADC and measure performance
2015:
Building a successive approximation (SAR) ADC
2016:
Building and measuring a sigma delta ADC
2017:
Build a C2C DAC for a successive approximation (SAR) ADC
2018:
2020:
Investigation of ADC and DAC realized with Arduino MKR WIFI 1010

Laboratory 2019

Students will do their reports as Internet web sites.
Making of a web report

A basic setup of files are provided here as an zip file (39 MB).

xxx910, A	A00	Lab01,2 Lab03 Lab04	xxx700, C	E00	Lab03 Lab04	xxx640, R	M00	Lab01 Lab02 Lab03 Lab04
xxx726, P	A01	Lab01,2 Lab03 Lab04	xxx ,	E01	Lab03 Lab04	xxx ,	M01	Lab01 Lab02 Lab03 Lab04
xxx848, S	B00	Lab03 Lab04	xxx639, R	H00	Lab01,2 Lab03 Lab04	xxx,	N00
xxx851, C	B01	Lab03 Lab04	xxx426, W	H01	Lab01,2 Lab03 Lab04	xxx,	N01
xxx136, H	C00	Lab03 Lab04	xxx600, K	J00	Lab03 Lab04	xxx ,	O00	Lab03
xxx742, K	C01	Lab03 Lab04	xxx419, L	J01	Lab03 Lab04	xxx,	O01	Lab03
xxx963, M	D00	Lab03 Lab04	xxx936, S	L00	Lab03 Lab04	xxx085, G	P00	Lab03 Lab04
xxx877, S	D01	Lab03 Lab04	xxx139, R	L01	Lab03 Lab04	xxx777, T	P01	Lab03 Lab04

Excercise:

Interface Electronics Problems

Overview of Practical Laboratories and Tools:

Intro: ADC simulation of INL, DNL and spectrum analysis
DAC simulation: DA Converter SPICE model INL and DNL

Read LTSPICE raw file for data converter analysis.

JavaScript ADC FFT histogram data analysis application with calibration
DAC measurement: Measuring a 10-Bit C2C DA converter

Digital signal generator

Read oscilloscope data
ADC simulation: Sigma Delta ADC simulation example
Building a SAR, pipeline and sigma delta ADC
Building a successive approximation (SAR) ADC
Build a pipelined ADC and measure performance
Building and measuring a sigma delta ADC

Duration: 22:23 min
Presentation of the Online Data Converter Framework

References:

[1]	Data Conversion Handbook (Analog Devices), Walter Kester PDF Documents
[2]	CMOS: Circuit Design, Layout, and Simulation, Revised Second Edition, R. Jacob Baker, Wiley, ISBN 978-0-470-22941-5, Revised 2nd Edition, 2008
[3]	CMOS: Mixed-Signal Circuit Design, Second Edition, Baker, Wiley 2009 www.cmosedu.com
[4]	EE247 Analog-Digital Interface Integrated Circuits, Haideh Khorramabadi Course Description and Material
[5]	EE315B - VLSI Data Conversion Circuits, Murmann, Stanford Murmann Web Page
[6]	P. E. Allen, D.R. Holberg, CMOS Analog IC Design, https://aicdesign.org/2016-short-course-notes-2/
[7]	IEEE Standard 1241 IEEE Std 1241
[8]	Data Converters, Franco Maloberti Data Converters, Springer
[9]	ECE 627 - Oversampled Delta-Sigma Data Converters, Oregon State University, Gabor C. Temes, Data Converters, Exams available
[10]	Analog-to-Digital Conversion, M. Pelgrom, second ed,. Springer,2013(optional)
[11]	Bezhad Razavi, 215D, Spring, Data converter problems UCLA pipelined ADC Simulator UPAS