This is a laboratory to simulate an ADC DAC set up with ramp and sine test.

Template for this laboratory:
Word example report
Open this report and save it with a file name suitable for you and the professor in a subdirectory.
Save all simulation input files, images, references in subdirectories with suitable names.

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V2 in1 0 PULSE()

Unfortunately this file is binary coded and timesteps are varying.
Extract the simulated values with Read Raw File .
You can also calculate INL, DNL with any tool you like.
Document and discuss INL and DNL values.

Simulate a sine signal test.
Extract the simulated values with Read Raw File .
Calculate FFT, INL, DNL with FFT webpage and paste the extracted values from LTSPICE into the input field.
Document and discuss FFT, INL, DNL and SNR values.

01:20: : Download schematics for schematics
04:10: : Download symbols for 4Bit_ADC_DAC_pipe.asc, 4Bit_ADC_pipe.asc, 4Bit_DAC_pipe.asc, sample_hold.asc, Switch.asc,WS2011_Prob4.asc
05:00: : Sine input
05:35: : Output signal
06:30: : LTSPICE FFT
07:30: : Ramp
09:35: : Voltage source

00:28: : Read LTSPICE raw data
04:15: : Start time 0, Stop time 655.36E-6, Time step: 40.96E-6
04:58: : First data
05:50: : Map to integer
06:25: : DNL INL graph
07:13: : Histogram with smaller step size 5.12E-6
08:10: : Map to integer
08:42: : ADC histogram analysis
09:20: : Simulate sine
09:50: : Read data values
11:05: : Histogramm test
11:40: : Copy values
12:00: : ADC FFT Javascript, Fill input data field, read integer values
12:50: : SNR 11.87-(-13.89) dB = 25.76 dB ENOB = (15.76-1.76)/6.02 = 4
13:16: : Sine histogram INL and DNL

ReadRaw File

Sometimes ReadRaw File.html has problems updating the directory link. Please check the displayed raw file for correct time.
Try changing the directory or reloading the internet page.
The raw files are quite big (100 MByte) so a little time is needed for extraction.

Start, Stop, step for LTSPICE and ReadRaw File

Ramp test

The digital input codes for a ramp up can be generated with pulse statements.
Example for a 4 Bit DAC:

V0 D0 0 PULSE(0 4 2m 1u 1u 2m 4m)
V1 D1 0 PULSE(0 4 4m 1u 1u 4m 8m)
V2 D2 0 PULSE(0 4 8m 1u 1u 8m 16m)
V3 D3 0 PULSE(0 4 16m 1u 1u 16m 32m)

Here the clock cycle time (last parameter), high time and delay is doubled for every higher order data input.
The delay is set to realize an up count.
The minimum cycle time is chosen, so that the output signal changing from the highest code (1111) to the lowest code (0000) is settled.

This simulation in this example needs 32 ms (.tran 32m, 2⁴ · 2 ms = 32 ms) for the ramp. Start would be 0 s and stop 32 ms = 32E-3 s. The internet tool does not support unit modifiers like u, m, k..
The step parameter would be 2E-3 (2 ms) to get 2⁴ = 16 DAC output voltage values.
Simulating and ADC with a ramp and histogramm test would need multiple samples per code.

Sine test

Starting value is the data converter sampling time t_sample.
Then a reasonable sample number is chosen N_sample = 4 · 2^NBit.
This gives the simulation time t_simulation = N_sample · t_sample.
.tran t_simulation
Sometimes initialization of the circuit is needed, adding to the simulation time and shifting the input signal.
An odd or prime number of periods N_periods for the sine is selected (1,3,11,101,1001, 10001).
The frequency for the sine signal f_signal can be calculated as f_signal = N_periods / t_simulation
The frequency of the sine signal has to have a high accuracy to make sure an integer number of periods is simulated.

In this example
t_sample = 10 ns.
N_sample = 65536 = 2 ¹⁶ = 4 · 2 ¹⁴.
t_simulation = t_sample · N_sample = 655.36us
f_signal = N_periods / t_simulation = 16784.66796875

For ReadRawFile Start = 0 Stop is 655.36E-6 and Step is 10E-9

00:34: : Include R2R DAC
01:52: : Simulate real R2R DAC
02:23: : Modify R values: R6 1.3k, R9 1.5k
03:16: : Read, mapto integer, copy values to FFT, process
04:29: : SNR 12.09-(-6.75) dB = 18.84 dB
04:55: : Ramp test
05:28: : Step 40.96E-6
06:07: : INL and DNL with error

00:44: Measurement statement
01:35: First measurement statement: .meas trans OUT00 FIND V(vout) at t=20.48u
05:20: .meas script