Overview

• Install webpage template
• Download LTSPICE files
• Simulation analysis
• Summary

Installation of webpage

• Download the template.zip file
• Unzip the file
• Go to Directory InEl_P2019
• Copied Directory 2019_GroupX to 2020_Group<xx>_<Lastname>
• In the directory copy the file: 2017_Group01_V00.html to 2020_Group<xx>_V1_<Lastname>
• Edit with Notepad++ or other text editor: 2020_Group<xx>_V1_<Lastname>
• Change header, change footer, made slide overview, installation

Test for 4 Bit ADC and DAC

A 4 Bit ADC and DAC test can be simulated in LTSPICE. The files were downloaded and LTSpice simulation was started The output file size can be limited by using the .save dialog option. A voltage source was added with a ramp from 0 V to 1 V with a rise time of 655 µs. The picture shows a ramp input voltage and the DAC ramp output Voltage over time. 16 steps can be seen. With a measurement statement the voltage levels were extracted. .Measure TRAN V0000 FIND V(Vout) AT=20u At 60 µs time the output of 0.0625 V is given for the code 0001. V0001: V(Vout)=0.0625 at 6e-005

LTSPICE schematics

JavaScript module SPICE_HTML_2018_02/LTSPICE.js Canvas, Control, Link, Code parts Add schematics to processing list ID has to be the same as the schematic name. INL and DNL error

Summary

Things learned

• Operating LTSpice
• Executing external Measurement Files
• INL and DNL errors

Problems solved

• LTSpice schematics not placed in the Webpage
• Struggle with external Measurement Files

References