Interface Electronics09 ADC ArchitecturesProf. Dr. Jörg Vollrath08 ADC introduction, sampling and jitter |
Video Lecture: Flash and SAR ADC
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Länge: 01:06:27 |
0:2:27 Question 0:2:27 ADC start last lecture 0:3:50 3-bit Flash ADC with R-string DAC with thermometer to binary encoder 0:9:19 Discussion speed, resolution 0:11:19 Thermometer code and binary code 0:13:47 Transistor function encoding binary output 0:15:49 Speed, parallel operation, input capacitance, 0:18:6 Power 0:19:36 LSB and gain = Vdd/LSB, limited bandwidth 0:21:14 Input noise, Voffset 0:24:31 Interpolating Flash ADC 0:28:22 Folding Flash ADC 0:37:19 SAR ADC 0:40:7 Operation example for input 0.6 V with Vref = 1 V 0:49:3 Details of the circuit in LTSPICE 0:52:18 Simulation time |
Review and Overview
- Flash ADC
- Interpolating and folding flash ADC
- Successive approximation (SAR) ADC
A practical example of a SAR
Flash ADC
OperationResolution BSpeedPower |
Version 4 SHEET 1 1480 708 WIRE 736 -784 608 -784 WIRE 784 -784 736 -784 WIRE 880 -784 784 -784 WIRE 608 -768 608 -784 WIRE 608 -672 608 -688 WIRE 912 -672 608 -672 WIRE 992 -672 976 -672 WIRE 736 -624 736 -704 WIRE 912 -624 736 -624 WIRE 992 -624 976 -624 WIRE 160 -576 160 -704 WIRE 640 -576 512 -576 WIRE 784 -576 640 -576 WIRE 880 -576 880 -704 WIRE 912 -576 880 -576 WIRE 992 -576 976 -576 WIRE 608 -560 608 -672 WIRE 608 -560 576 -560 WIRE 736 -560 736 -624 WIRE 736 -560 704 -560 WIRE 880 -560 880 -576 WIRE 880 -560 832 -560 WIRE 240 -512 240 -688 WIRE 256 -512 240 -512 WIRE 384 -512 368 -512 WIRE 512 -512 512 -576 WIRE 512 -512 384 -512 WIRE 592 -512 576 -512 WIRE 864 -512 832 -512 WIRE 368 -496 368 -512 WIRE 368 -496 320 -496 WIRE 160 -480 160 -496 WIRE 256 -480 160 -480 WIRE 512 -480 512 -512 WIRE 528 -480 512 -480 WIRE 640 -480 640 -576 WIRE 656 -480 640 -480 WIRE 784 -480 784 -576 WIRE 592 -464 592 -512 WIRE 592 -464 576 -464 WIRE 864 -464 864 -512 WIRE 864 -464 832 -464 WIRE 160 -448 160 -480 WIRE 576 -448 576 -464 WIRE 704 -448 704 -464 WIRE 832 -448 832 -464 WIRE 528 -416 512 -416 WIRE 640 -416 528 -416 WIRE 608 -400 608 -560 WIRE 608 -400 576 -400 WIRE 736 -400 736 -560 WIRE 736 -400 704 -400 WIRE 368 -384 368 -496 WIRE 384 -384 368 -384 WIRE 240 -368 240 -512 WIRE 256 -368 240 -368 WIRE 512 -368 512 -416 WIRE 512 -368 464 -368 WIRE 368 -352 320 -352 WIRE 400 -352 368 -352 WIRE 592 -352 576 -352 WIRE 160 -336 160 -368 WIRE 256 -336 160 -336 WIRE 512 -320 512 -368 WIRE 528 -320 512 -320 WIRE 640 -320 640 -416 WIRE 656 -320 640 -320 WIRE 160 -304 160 -336 WIRE 592 -304 592 -352 WIRE 592 -304 576 -304 WIRE 576 -288 576 -304 WIRE 704 -288 704 -304 WIRE 528 -256 512 -256 WIRE 640 -256 528 -256 WIRE 608 -240 608 -400 WIRE 608 -240 576 -240 WIRE 880 -240 880 -560 WIRE 880 -240 816 -240 WIRE 368 -224 368 -352 WIRE 384 -224 368 -224 WIRE 240 -208 240 -368 WIRE 256 -208 240 -208 WIRE 512 -208 512 -256 WIRE 512 -208 464 -208 WIRE 368 -192 320 -192 WIRE 400 -192 368 -192 WIRE 592 -192 576 -192 WIRE 864 -192 816 -192 WIRE 160 -176 160 -224 WIRE 256 -176 160 -176 WIRE 160 -160 160 -176 WIRE 512 -160 512 -208 WIRE 528 -160 512 -160 WIRE 640 -160 640 -256 WIRE 768 -160 640 -160 WIRE 592 -144 592 -192 WIRE 592 -144 576 -144 WIRE 864 -144 864 -192 WIRE 864 -144 816 -144 WIRE 576 -128 576 -144 WIRE 816 -128 816 -144 WIRE 368 -96 368 -192 WIRE 384 -96 368 -96 WIRE 608 -96 608 -240 WIRE 608 -96 576 -96 WIRE 240 -80 240 -208 WIRE 256 -80 240 -80 WIRE 512 -80 464 -80 WIRE 368 -64 320 -64 WIRE 400 -64 368 -64 WIRE 160 -48 160 -80 WIRE 256 -48 160 -48 WIRE 592 -48 576 -48 WIRE 160 -32 160 -48 WIRE 512 -16 512 -80 WIRE 528 -16 512 -16 WIRE 592 0 592 -48 WIRE 592 0 576 0 WIRE 576 16 576 0 WIRE 368 32 368 -64 WIRE 384 32 368 32 WIRE 544 48 464 48 WIRE 640 48 544 48 WIRE 768 48 640 48 WIRE 880 48 880 -240 WIRE 880 48 816 48 WIRE 240 64 240 -80 WIRE 256 64 240 64 WIRE 400 64 368 64 WIRE 736 64 736 -400 WIRE 736 64 688 64 WIRE 368 80 368 64 WIRE 368 80 320 80 WIRE 160 96 160 48 WIRE 256 96 160 96 WIRE 848 96 816 96 WIRE 720 112 688 112 WIRE 768 128 768 48 WIRE 640 144 640 48 WIRE 848 144 848 96 WIRE 848 144 816 144 WIRE 720 160 720 112 WIRE 720 160 688 160 WIRE 688 176 688 160 WIRE 816 176 816 144 WIRE 368 208 368 80 WIRE 384 208 368 208 WIRE 736 208 736 64 WIRE 736 208 688 208 WIRE 240 224 240 64 WIRE 256 224 240 224 WIRE 560 224 464 224 WIRE 640 224 560 224 WIRE 368 240 320 240 WIRE 400 240 368 240 WIRE 160 256 160 176 WIRE 256 256 160 256 WIRE 720 256 688 256 WIRE 880 272 880 48 WIRE 880 272 816 272 WIRE 640 288 640 224 WIRE 720 304 720 256 WIRE 720 304 688 304 WIRE 688 320 688 304 WIRE 848 320 816 320 WIRE 368 336 368 240 WIRE 384 336 368 336 WIRE 240 352 240 224 WIRE 256 352 240 352 WIRE 576 352 464 352 WIRE 768 352 576 352 WIRE 368 368 320 368 WIRE 400 368 368 368 WIRE 848 368 848 320 WIRE 848 368 816 368 WIRE 160 384 160 336 WIRE 256 384 160 384 WIRE 160 400 160 384 WIRE 816 400 816 368 WIRE 160 496 160 480 FLAG 160 -704 Vref FLAG 688 176 0 FLAG 688 320 0 FLAG 816 176 0 FLAG 160 496 0 FLAG 992 -576 D0 IOPIN 992 -576 Out FLAG 992 -624 D1 IOPIN 992 -624 Out FLAG 816 400 0 FLAG 784 -784 VDD FLAG 240 -688 Vin IOPIN 240 -688 In FLAG 992 -672 D2 IOPIN 992 -672 Out FLAG 576 16 0 FLAG 576 -128 0 FLAG 816 -128 0 FLAG 576 -288 0 FLAG 704 -288 0 FLAG 576 -448 0 FLAG 704 -448 0 FLAG 832 -448 0 FLAG 368 240 c1 FLAG 368 64 C2 FLAG 368 -64 C3 FLAG 368 -192 C4 FLAG 384 -512 C6 FLAG 368 -352 C5 FLAG 368 368 C0 FLAG 576 352 B0 FLAG 560 224 B1 FLAG 544 48 B2 FLAG 512 -80 B3 FLAG 528 -256 B4 FLAG 528 -416 B5 SYMBOL res 144 -48 R0 SYMATTR InstName R1 SYMATTR Value 4k SYMBOL res 144 80 R0 SYMATTR InstName R2 SYMATTR Value 4k SYMBOL res 144 240 R0 SYMATTR InstName R4 SYMATTR Value 4k SYMBOL res 144 384 R0 SYMATTR InstName R6 SYMATTR Value 4k SYMBOL res 720 -800 R0 SYMATTR InstName R3 SYMATTR Value 100k SYMBOL res 864 -800 R0 SYMATTR InstName R5 SYMATTR Value 100k SYMBOL NOTAND2 432 352 R0 SYMATTR InstName X1 SYMBOL NOTAND2 432 224 R0 SYMATTR InstName X2 SYMBOL NOTAND2 432 48 R0 SYMATTR InstName X3 SYMBOL res 592 -784 R0 SYMATTR InstName R7 SYMATTR Value 100k SYMBOL NOTAND2 432 -80 R0 SYMATTR InstName X4 SYMBOL res 144 -176 R0 SYMATTR InstName R8 SYMATTR Value 4k SYMBOL res 144 -320 R0 SYMATTR InstName R9 SYMATTR Value 4k SYMBOL res 144 -464 R0 SYMATTR InstName R10 SYMATTR Value 4k SYMBOL NOTAND2 432 -208 R0 SYMATTR InstName X5 SYMBOL NOTAND2 432 -368 R0 SYMATTR InstName X6 SYMBOL nmos4 528 -560 R0 SYMATTR InstName M10 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 656 -560 R0 SYMATTR InstName M1 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 784 -560 R0 SYMATTR InstName M2 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 528 -400 R0 SYMATTR InstName M3 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 656 -400 R0 SYMATTR InstName M4 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 768 -240 R0 SYMATTR InstName M5 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 528 -240 R0 SYMATTR InstName M7 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 528 -96 R0 SYMATTR InstName M8 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 640 64 R0 SYMATTR InstName M9 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 768 48 R0 SYMATTR InstName M11 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 640 208 R0 SYMATTR InstName M12 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL OpampReal 288 -496 R0 WINDOW 0 32 -40 Bottom 2 SYMATTR InstName X7 SYMBOL OpampReal 288 -352 R0 WINDOW 0 32 -40 Bottom 2 SYMATTR InstName X8 SYMBOL OpampReal 288 -192 R0 WINDOW 0 32 -40 Bottom 2 SYMATTR InstName X9 SYMBOL OpampReal 288 -64 R0 WINDOW 0 32 -40 Bottom 2 SYMATTR InstName X10 SYMBOL OpampReal 288 80 R0 WINDOW 0 32 -40 Bottom 2 SYMATTR InstName X11 SYMBOL OpampReal 288 240 R0 WINDOW 0 32 -40 Bottom 2 SYMATTR InstName X12 SYMBOL OpampReal 288 368 R0 WINDOW 0 32 -40 Bottom 2 SYMATTR InstName X13 SYMBOL nmos4 768 272 R0 SYMATTR InstName M6 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL res 144 -592 R0 SYMATTR InstName R11 SYMATTR Value 4k SYMBOL INVx 944 -576 R0 SYMATTR InstName X15 SYMBOL INVx 944 -672 R0 SYMATTR InstName X14 SYMBOL INVx 944 -624 R0 SYMATTR InstName X16 TEXT 336 488 Left 2 !.include cmosedu_models.txt\n.include opamp.sub\n.global VDD\nVDD VDD 0 DC 1.0\nVref Vref 0 DC 0.8\nV1 Vin 0 PULSE(0 1.0 0 50m 50m 0 100m) TEXT 424 -616 Left 2 !.tran 100m TEXT 368 -808 Left 2 ;Thermometer to Binary RECTANGLE Normal 976 432 352 -832 2cmosedu_models.txt |
The Flash ADC generates a thermometer code.
For each level one comparator is needed. High count of comparators, high input capacitance.
High resolution requires low comparator offset and high gain to generate a full level digital signal.
The offset of a comparator depends on the size of the CMOS input transistors:
Voffset ∝ \frac{1}{\sqrt{W \cdot L}}
Lower noise means higher area and higher input capacitance.
If the requirement for comparator offset is not met or noise is present sparkle codes can happen.
The thermometer code is corrupted having more than one transition from 0 to 1.
The code for the first '01' transition is 'OR'ed with the code of the second '01' transition.
Additional digital circuit can be required.
Comparators can feedback noise to the reference voltage ladder. Capacitive coupling between comparator output and intput.
| Thermometer code | Binary Code | ||||||||
| T6 | T5 | T4 | T3 | T2 | T1 | T0 | B2 | B1 | B0 |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
| 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
For each level one comparator is needed. High count of comparators, high input capacitance.
High resolution requires low comparator offset and high gain to generate a full level digital signal.
| Number of Bits | Maximum Offset | Gain |
| 4 | 0.0625 · Vref | 16 |
| 8 | 0.004 · Vref | 256 |
| 10 | 0.001 · Vref | 1024 |
| 12 | 0.0025 · Vref | 4048 |
The offset of a comparator depends on the size of the CMOS input transistors:
Voffset ∝ \frac{1}{\sqrt{W \cdot L}}
Lower noise means higher area and higher input capacitance.
If the requirement for comparator offset is not met or noise is present sparkle codes can happen.
The thermometer code is corrupted having more than one transition from 0 to 1.
| Correct code: | 000000011111111 | Encoded binary code | 1000 |
| Sparkle code: | 000000010111111 | Encoded binary code | 1110 |
Additional digital circuit can be required.
Comparators can feedback noise to the reference voltage ladder. Capacitive coupling between comparator output and intput.
Interpolating flash ADC
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Reduce the number of comparators using interpolation. The output of the preamplifiers are coupled with resistors. |
Version 4 SHEET 1 1480 708 WIRE 736 -784 608 -784 WIRE 784 -784 736 -784 WIRE 880 -784 784 -784 WIRE 608 -768 608 -784 WIRE 608 -672 608 -688 WIRE 912 -672 608 -672 WIRE 992 -672 976 -672 WIRE 736 -624 736 -704 WIRE 912 -624 736 -624 WIRE 992 -624 976 -624 WIRE 96 -576 96 -704 WIRE 640 -576 512 -576 WIRE 784 -576 640 -576 WIRE 880 -576 880 -704 WIRE 912 -576 880 -576 WIRE 992 -576 976 -576 WIRE 608 -560 608 -672 WIRE 608 -560 576 -560 WIRE 736 -560 736 -624 WIRE 736 -560 704 -560 WIRE 880 -560 880 -576 WIRE 880 -560 832 -560 WIRE 176 -512 176 -688 WIRE 192 -512 176 -512 WIRE 384 -512 368 -512 WIRE 512 -512 512 -576 WIRE 512 -512 384 -512 WIRE 592 -512 576 -512 WIRE 864 -512 832 -512 WIRE 368 -496 368 -512 WIRE 368 -496 256 -496 WIRE 96 -480 96 -496 WIRE 192 -480 96 -480 WIRE 512 -480 512 -512 WIRE 528 -480 512 -480 WIRE 640 -480 640 -576 WIRE 656 -480 640 -480 WIRE 784 -480 784 -576 WIRE 256 -464 256 -496 WIRE 592 -464 592 -512 WIRE 592 -464 576 -464 WIRE 864 -464 864 -512 WIRE 864 -464 832 -464 WIRE 96 -448 96 -480 WIRE 576 -448 576 -464 WIRE 704 -448 704 -464 WIRE 832 -448 832 -464 WIRE 528 -416 512 -416 WIRE 640 -416 528 -416 WIRE 608 -400 608 -560 WIRE 608 -400 576 -400 WIRE 736 -400 736 -560 WIRE 736 -400 704 -400 WIRE 368 -384 368 -496 WIRE 384 -384 368 -384 WIRE 512 -368 512 -416 WIRE 512 -368 464 -368 WIRE 400 -352 368 -352 WIRE 592 -352 576 -352 WIRE 256 -336 256 -384 WIRE 368 -336 368 -352 WIRE 368 -336 256 -336 WIRE 512 -320 512 -368 WIRE 528 -320 512 -320 WIRE 640 -320 640 -416 WIRE 656 -320 640 -320 WIRE 96 -304 96 -368 WIRE 592 -304 592 -352 WIRE 592 -304 576 -304 WIRE 576 -288 576 -304 WIRE 704 -288 704 -304 WIRE 528 -256 512 -256 WIRE 640 -256 528 -256 WIRE 608 -240 608 -400 WIRE 608 -240 576 -240 WIRE 880 -240 880 -560 WIRE 880 -240 816 -240 WIRE 368 -224 368 -336 WIRE 384 -224 368 -224 WIRE 176 -208 176 -512 WIRE 192 -208 176 -208 WIRE 512 -208 512 -256 WIRE 512 -208 464 -208 WIRE 256 -192 256 -256 WIRE 368 -192 256 -192 WIRE 400 -192 368 -192 WIRE 592 -192 576 -192 WIRE 864 -192 816 -192 WIRE 96 -176 96 -224 WIRE 192 -176 96 -176 WIRE 96 -160 96 -176 WIRE 256 -160 256 -192 WIRE 512 -160 512 -208 WIRE 528 -160 512 -160 WIRE 640 -160 640 -256 WIRE 768 -160 640 -160 WIRE 592 -144 592 -192 WIRE 592 -144 576 -144 WIRE 864 -144 864 -192 WIRE 864 -144 816 -144 WIRE 576 -128 576 -144 WIRE 816 -128 816 -144 WIRE 368 -96 368 -192 WIRE 384 -96 368 -96 WIRE 608 -96 608 -240 WIRE 608 -96 576 -96 WIRE 512 -80 464 -80 WIRE 256 -64 256 -80 WIRE 368 -64 256 -64 WIRE 400 -64 368 -64 WIRE 256 -48 256 -64 WIRE 592 -48 576 -48 WIRE 96 -32 96 -80 WIRE 512 -16 512 -80 WIRE 528 -16 512 -16 WIRE 592 0 592 -48 WIRE 592 0 576 0 WIRE 576 16 576 0 WIRE 368 32 368 -64 WIRE 384 32 368 32 WIRE 544 48 464 48 WIRE 640 48 544 48 WIRE 768 48 640 48 WIRE 880 48 880 -240 WIRE 880 48 816 48 WIRE 176 64 176 -208 WIRE 192 64 176 64 WIRE 400 64 368 64 WIRE 736 64 736 -400 WIRE 736 64 688 64 WIRE 256 80 256 32 WIRE 368 80 368 64 WIRE 368 80 256 80 WIRE 96 96 96 48 WIRE 192 96 96 96 WIRE 848 96 816 96 WIRE 256 112 256 80 WIRE 720 112 688 112 WIRE 768 128 768 48 WIRE 640 144 640 48 WIRE 848 144 848 96 WIRE 848 144 816 144 WIRE 720 160 720 112 WIRE 720 160 688 160 WIRE 688 176 688 160 WIRE 816 176 816 144 WIRE 368 208 368 80 WIRE 384 208 368 208 WIRE 736 208 736 64 WIRE 736 208 688 208 WIRE 560 224 464 224 WIRE 640 224 560 224 WIRE 256 240 256 192 WIRE 368 240 256 240 WIRE 400 240 368 240 WIRE 96 256 96 176 WIRE 256 256 256 240 WIRE 720 256 688 256 WIRE 880 272 880 48 WIRE 880 272 816 272 WIRE 640 288 640 224 WIRE 720 304 720 256 WIRE 720 304 688 304 WIRE 688 320 688 304 WIRE 848 320 816 320 WIRE 368 336 368 240 WIRE 384 336 368 336 WIRE 176 352 176 64 WIRE 192 352 176 352 WIRE 576 352 464 352 WIRE 768 352 576 352 WIRE 256 368 256 336 WIRE 368 368 256 368 WIRE 400 368 368 368 WIRE 848 368 848 320 WIRE 848 368 816 368 WIRE 96 384 96 336 WIRE 192 384 96 384 WIRE 96 400 96 384 WIRE 816 400 816 368 WIRE 96 496 96 480 FLAG 96 -704 Vref FLAG 688 176 0 FLAG 688 320 0 FLAG 816 176 0 FLAG 96 496 0 FLAG 992 -576 D0 IOPIN 992 -576 Out FLAG 992 -624 D1 IOPIN 992 -624 Out FLAG 816 400 0 FLAG 784 -784 VDD FLAG 176 -688 Vin IOPIN 176 -688 In FLAG 992 -672 D2 IOPIN 992 -672 Out FLAG 576 16 0 FLAG 576 -128 0 FLAG 816 -128 0 FLAG 576 -288 0 FLAG 704 -288 0 FLAG 576 -448 0 FLAG 704 -448 0 FLAG 832 -448 0 FLAG 368 240 c1 FLAG 368 64 C2 FLAG 368 -64 C3 FLAG 368 -192 C4 FLAG 384 -512 C6 FLAG 368 -352 C5 FLAG 368 368 C0 FLAG 576 352 B0 FLAG 560 224 B1 FLAG 544 48 B2 FLAG 512 -80 B3 FLAG 528 -256 B4 FLAG 528 -416 B5 SYMBOL res 80 -48 R0 SYMATTR InstName R1 SYMATTR Value 4k SYMBOL res 80 80 R0 SYMATTR InstName R2 SYMATTR Value 4k SYMBOL res 80 240 R0 SYMATTR InstName R4 SYMATTR Value 4k SYMBOL res 80 384 R0 SYMATTR InstName R6 SYMATTR Value 16k SYMBOL res 720 -800 R0 SYMATTR InstName R3 SYMATTR Value 100k SYMBOL res 864 -800 R0 SYMATTR InstName R5 SYMATTR Value 100k SYMBOL NOTAND2 432 352 R0 SYMATTR InstName X1 SYMBOL NOTAND2 432 224 R0 SYMATTR InstName X2 SYMBOL NOTAND2 432 48 R0 SYMATTR InstName X3 SYMBOL res 592 -784 R0 SYMATTR InstName R7 SYMATTR Value 100k SYMBOL NOTAND2 432 -80 R0 SYMATTR InstName X4 SYMBOL res 80 -176 R0 SYMATTR InstName R8 SYMATTR Value 4k SYMBOL res 80 -320 R0 SYMATTR InstName R9 SYMATTR Value 4k SYMBOL res 80 -464 R0 SYMATTR InstName R10 SYMATTR Value 4k SYMBOL NOTAND2 432 -208 R0 SYMATTR InstName X5 SYMBOL NOTAND2 432 -368 R0 SYMATTR InstName X6 SYMBOL nmos4 528 -560 R0 SYMATTR InstName M10 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 656 -560 R0 SYMATTR InstName M1 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 784 -560 R0 SYMATTR InstName M2 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 528 -400 R0 SYMATTR InstName M3 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 656 -400 R0 SYMATTR InstName M4 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 768 -240 R0 SYMATTR InstName M5 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 528 -240 R0 SYMATTR InstName M7 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 528 -96 R0 SYMATTR InstName M8 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 640 64 R0 SYMATTR InstName M9 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 768 48 R0 SYMATTR InstName M11 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL nmos4 640 208 R0 SYMATTR InstName M12 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL OpampReal 224 -496 R0 WINDOW 0 32 -40 Bottom 2 SYMATTR InstName X7 SYMBOL OpampReal 224 -192 R0 WINDOW 0 32 -40 Bottom 2 SYMATTR InstName X9 SYMBOL OpampReal 224 80 R0 WINDOW 0 32 -40 Bottom 2 SYMATTR InstName X11 SYMBOL OpampReal 224 368 R0 WINDOW 0 32 -40 Bottom 2 SYMATTR InstName X13 SYMBOL nmos4 768 272 R0 SYMATTR InstName M6 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.2u SYMBOL res 80 -592 R0 SYMATTR InstName R11 SYMATTR Value 16k SYMBOL INVx 944 -576 R0 SYMATTR InstName X15 SYMBOL INVx 944 -672 R0 SYMATTR InstName X14 SYMBOL INVx 944 -624 R0 SYMATTR InstName X16 SYMBOL res 240 -64 R0 SYMATTR InstName R12 SYMATTR Value 400k SYMBOL res 240 -176 R0 SYMATTR InstName R13 SYMATTR Value 400k SYMBOL res 240 -352 R0 SYMATTR InstName R14 SYMATTR Value 400k SYMBOL res 240 -480 R0 SYMATTR InstName R15 SYMATTR Value 400k SYMBOL res 240 96 R0 SYMATTR InstName R16 SYMATTR Value 400k SYMBOL res 240 240 R0 SYMATTR InstName R17 SYMATTR Value 400k TEXT 336 488 Left 2 !.include cmosedu_models.txt\n.include opamp.sub\n.global VDD\nVDD VDD 0 DC 1.0\nVref Vref 0 DC 0.8\nV1 Vin 0 PULSE(0 1.0 0 50m 50m 0 100m) TEXT 424 -616 Left 2 !.tran 100m TEXT 368 -808 Left 2 ;Thermometer to Binary RECTANGLE Normal 976 432 352 -832 2 |
Folding flash ADC
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Reduce the number of comparators using folding. |
 Version 4 SHEET 1 1904 680 WIRE 112 -208 48 -208 WIRE 272 -208 112 -208 WIRE 112 -192 112 -208 WIRE 272 -192 272 -208 WIRE 112 -96 112 -112 WIRE 112 -96 32 -96 WIRE 272 -96 272 -112 WIRE 368 -96 272 -96 WIRE -16 -80 -80 -80 WIRE -80 -64 -80 -80 WIRE 112 -48 112 -96 WIRE 560 -48 112 -48 WIRE 704 -48 560 -48 WIRE 1152 -48 704 -48 WIRE -16 -16 -16 -80 WIRE -16 -16 -80 -16 WIRE 272 0 272 -96 WIRE 400 0 272 0 WIRE 864 0 400 0 WIRE 992 0 864 0 WIRE -128 16 -144 16 WIRE -144 48 -144 16 WIRE -80 48 -80 32 WIRE -80 48 -144 48 WIRE -80 64 -80 48 WIRE 112 80 112 -48 WIRE 272 80 272 0 WIRE 400 80 400 0 WIRE 560 80 560 -48 WIRE 704 80 704 -48 WIRE 864 80 864 0 WIRE 992 80 992 0 WIRE 1152 80 1152 -48 WIRE 144 128 112 128 WIRE 320 128 272 128 WIRE 432 128 400 128 WIRE 608 128 560 128 WIRE 736 128 704 128 WIRE 912 128 864 128 WIRE 1024 128 992 128 WIRE 1200 128 1152 128 WIRE -80 160 -80 144 WIRE -80 160 -128 160 WIRE 0 160 -80 160 WIRE 64 160 32 160 WIRE 176 160 176 128 WIRE 224 160 176 160 WIRE 352 160 336 160 WIRE 368 160 352 160 WIRE 464 160 464 128 WIRE 512 160 464 160 WIRE 656 160 624 160 WIRE 768 160 768 128 WIRE 816 160 768 160 WIRE 944 160 928 160 WIRE 960 160 944 160 WIRE 1056 160 1056 128 WIRE 1104 160 1056 160 WIRE -80 176 -80 160 WIRE 112 192 112 176 WIRE 240 192 112 192 WIRE 272 192 272 176 WIRE 272 192 240 192 WIRE 400 192 400 176 WIRE 528 192 400 192 WIRE 560 192 560 176 WIRE 560 192 528 192 WIRE 704 192 704 176 WIRE 832 192 704 192 WIRE 864 192 864 176 WIRE 864 192 832 192 WIRE 992 192 992 176 WIRE 1120 192 992 192 WIRE 1152 192 1152 176 WIRE 1152 192 1120 192 WIRE 240 208 240 192 WIRE 528 208 528 192 WIRE 832 208 832 192 WIRE 1120 208 1120 192 WIRE -32 224 -80 224 WIRE -128 256 -128 160 WIRE 288 256 240 256 WIRE 576 256 528 256 WIRE 880 256 832 256 WIRE 1168 256 1120 256 WIRE 192 288 176 288 WIRE 480 288 464 288 WIRE 784 288 768 288 WIRE 1072 288 1056 288 WIRE -80 304 -80 272 WIRE -32 304 -32 224 WIRE -32 304 -80 304 WIRE 144 304 144 128 WIRE 240 304 144 304 WIRE 288 304 288 256 WIRE 288 304 240 304 WIRE 320 304 320 128 WIRE 320 304 288 304 WIRE 432 304 432 128 WIRE 528 304 432 304 WIRE 576 304 576 256 WIRE 576 304 528 304 WIRE 608 304 608 128 WIRE 608 304 576 304 WIRE 736 304 736 128 WIRE 832 304 736 304 WIRE 880 304 880 256 WIRE 880 304 832 304 WIRE 912 304 912 128 WIRE 912 304 880 304 WIRE 1024 304 1024 128 WIRE 1120 304 1024 304 WIRE 1168 304 1168 256 WIRE 1168 304 1120 304 WIRE 1200 304 1200 128 WIRE 1200 304 1168 304 WIRE -80 320 -80 304 WIRE 240 336 240 304 WIRE 528 336 528 304 WIRE 832 336 832 304 WIRE 1120 336 1120 304 WIRE 0 368 0 160 WIRE 176 368 176 288 WIRE 176 368 0 368 WIRE 464 368 464 288 WIRE 464 368 176 368 WIRE 768 368 768 288 WIRE 768 368 464 368 WIRE 1056 368 1056 288 WIRE 1056 368 768 368 WIRE 32 400 32 160 WIRE 32 400 0 400 WIRE 336 400 336 160 WIRE 336 400 32 400 WIRE 624 400 624 160 WIRE 624 400 336 400 WIRE 928 400 928 160 WIRE 928 400 624 400 FLAG 272 -208 VDD FLAG 368 -96 Y1 IOPIN 368 -96 Out FLAG 0 400 Vin IOPIN 0 400 In FLAG 176 128 Vf1 IOPIN 176 128 In FLAG 240 336 0 FLAG -80 -80 VDD FLAG 464 128 Vf2 IOPIN 464 128 In FLAG 528 336 0 FLAG 768 128 Vf3 IOPIN 768 128 In FLAG 832 336 0 FLAG 1056 128 Vf4 IOPIN 1056 128 In FLAG 1120 336 0 FLAG -80 320 0 FLAG 32 -96 Y2 IOPIN 32 -96 Out SYMBOL nmos4 224 80 R0 SYMATTR InstName M1 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL nmos4 64 80 R0 SYMATTR InstName M3 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL nmos4 192 208 R0 SYMATTR InstName M5 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL pmos4 -128 -64 R0 SYMATTR InstName M6 SYMATTR Value P SYMATTR Value2 l=0.05u w=0.10u SYMBOL nmos4 512 80 R0 SYMATTR InstName M7 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL nmos4 352 80 R0 SYMATTR InstName M8 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL nmos4 480 208 R0 SYMATTR InstName M9 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL nmos4 816 80 R0 SYMATTR InstName M10 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL nmos4 656 80 R0 SYMATTR InstName M11 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL nmos4 784 208 R0 SYMATTR InstName M12 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL nmos4 1104 80 R0 SYMATTR InstName M13 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL nmos4 944 80 R0 SYMATTR InstName M14 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL nmos4 1072 208 R0 SYMATTR InstName M15 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL nmos4 -128 176 R0 SYMATTR InstName M16 SYMATTR Value N SYMATTR Value2 l=0.05u w=0.1u SYMBOL res -96 48 R0 SYMATTR InstName R1 SYMATTR Value 100k SYMBOL res 96 -208 R0 SYMATTR InstName R4 SYMATTR Value 100k SYMBOL res 256 -208 R0 SYMATTR InstName R5 SYMATTR Value 100k TEXT -96 -480 Left 2 !.include cmosedu_models.txt\n.include opamp.sub\n.global VDD\nVDD VDD 0 DC 1.0\nVf1 Vf1 0 DC 0.4\nVf2 Vf2 0 DC 0.5\nVf3 Vf3 0 DC 0.6\nVf4 Vf4 0 DC 0.7\nV1 Vin 0 PULSE(0 1.0 0 50m 50m 0 100m) TEXT -144 480 Left 2 !.tran 100m |
SAR ADC: Blocks
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DAC_R2R_6Bit.asc DAC_R2R_6Bit.asy Register6.asc Register6.asy Sample_and_hold.asc Sample_and_hold.asy CMP.asc CMP.asy SAR_CTRL_6bit.asc SAR_CTRL_6bit.asy Version 4 SHEET 1 1360 1288 WIRE 784 -880 752 -880 WIRE 672 -784 640 -784 WIRE 944 -784 928 -784 WIRE 944 -720 944 -784 WIRE 960 -720 944 -720 WIRE 1120 -704 1088 -704 WIRE 960 -688 944 -688 WIRE 784 -672 784 -704 WIRE 784 -672 688 -672 WIRE 1120 -640 1120 -704 WIRE 1120 -640 272 -640 WIRE 496 -592 480 -592 WIRE 816 -592 768 -592 WIRE 768 -576 768 -592 WIRE 944 -576 944 -688 WIRE 512 -560 480 -560 WIRE 816 -560 512 -560 WIRE 528 -528 480 -528 WIRE 816 -528 528 -528 WIRE 288 -512 208 -512 WIRE 944 -512 944 -576 WIRE 944 -512 928 -512 WIRE 544 -496 480 -496 WIRE 816 -496 544 -496 WIRE 272 -480 272 -640 WIRE 288 -480 272 -480 WIRE 560 -464 480 -464 WIRE 816 -464 560 -464 WIRE 288 -448 208 -448 WIRE 576 -432 480 -432 WIRE 816 -432 576 -432 WIRE 592 -400 480 -400 WIRE 640 -368 480 -368 WIRE 688 -368 688 -672 WIRE 688 -368 640 -368 WIRE 496 -336 496 -592 WIRE 816 -336 496 -336 WIRE 816 -304 688 -304 WIRE 1008 -288 944 -288 WIRE 512 -272 512 -560 WIRE 736 -272 512 -272 WIRE 816 -272 736 -272 WIRE 1008 -256 944 -256 WIRE 528 -240 528 -528 WIRE 720 -240 528 -240 WIRE 816 -240 720 -240 WIRE 1008 -224 944 -224 WIRE 544 -208 544 -496 WIRE 736 -208 544 -208 WIRE 816 -208 736 -208 WIRE 1008 -192 944 -192 WIRE 560 -176 560 -464 WIRE 720 -176 560 -176 WIRE 816 -176 720 -176 WIRE 1008 -160 944 -160 WIRE 576 -144 576 -432 WIRE 736 -144 576 -144 WIRE 816 -144 736 -144 WIRE 1008 -128 944 -128 WIRE 592 -112 592 -400 WIRE 720 -112 592 -112 WIRE 816 -112 720 -112 WIRE 768 -80 752 -80 WIRE 816 -80 768 -80 FLAG 640 -784 IN FLAG 944 -576 OUT FLAG 768 -576 0 FLAG 736 -272 Q0 FLAG 720 -240 Q1 FLAG 736 -208 Q2 FLAG 720 -176 Q3 FLAG 736 -144 Q4 FLAG 720 -112 Q5 FLAG 768 -80 RSTb FLAG 1008 -288 X0 FLAG 1008 -256 X1 FLAG 1008 -224 X2 FLAG 1008 -192 X3 FLAG 1008 -160 X4 FLAG 1008 -128 X5 FLAG 752 -880 VDD FLAG 208 -448 RSTb FLAG 688 -304 CLK FLAG 208 -512 CLK FLAG 1120 -704 CMP FLAG 640 -368 sample FLAG 944 -784 INX SYMBOL CMP 1024 -704 M180 SYMATTR InstName X7 SYMBOL DAC_R2R_6Bit 864 -512 R0 SYMATTR InstName X1 SYMBOL Register6 880 -208 R0 SYMATTR InstName X8 SYMBOL Sample_and_hold 688 -720 R0 SYMATTR InstName X9 SYMBOL SAR_CTRL_6bit 384 -480 R0 SYMATTR InstName X2 TEXT 80 -912 Left 2 !.include cmosedu_models.txt\n.global VDD CE\nVDD VDD 0 DC 1\nVCLK CLK 0 PULSE(0 1 0n 1n 1n 8n 20n)\nVCLK1 CLK1 0 PULSE(0 1 0n 1n 1n 8n 20n)\nVCE CE 0 DC 1\nVCLR RSTb 0 PULSE(1 0 5n 1n 1n 28n 280000n)\nVIn IN 0 PULSE(0 1 0n 4000n 4000n 400n 8400n) TEXT 304 -96 Left 2 !.tran 4000n TEXT 224 -32 Left 2 ;4000ns Ramp of V(In), 20ns CLK rate 50MHz, 50nm models, 120ns conversion 5 Bits TEXT 976 -400 Left 2 ;DAC TEXT 976 -752 Left 2 ;CMP TEXT 960 -360 Left 2 ;Output\nBuffer TEXT 808 -888 Left 2 ;Sample and Hold |
At the beginning of the conversion an input signal is sampled.
The comparator compares it with the output of the DAC.
The state machine sets the MSB depending on the outcome of the comparison and then tries the next bit.
The comparator compares it with the output of the DAC.
The state machine sets the MSB depending on the outcome of the comparison and then tries the next bit.
SAR ADC: Flow, Algorithm, Simulation
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Set MSB to 1: 100000 Loop until LSB set: Compare DAC output with analog input: If DAC output > analog input reset current bit. Try and set next bit. End Loop Blue line shows analog input voltage. Green shows output of internal DAC. Red shows output code with MSB first. |
1 * 0.5 + 0 * 0.25 + 0 * 0.125 + 1 * 0.0625 + 1 * 0.03125 + 0 * 0.015625 + 0 * 0.0078125 + 1 * 0.00390625
0.59765625
SAR ADC: Benefits and Challenges
- Separate blocks can be optimized individually
- Comparator gain and offset:
LSB * gain = Vref
Voffset < LSB
ΔV << LSB: Metastability - Conversion time: n-bits * Settling time
tconv= n * tsettle
Github: 130nm Skywater eFabless 130nm SAR ADC
M. Moser, H. Pretl, "Design of a Low-Power 12-bit Non-Binary Charge-Redistribution SAR-ADC utilizing the SKY130 Open-Source Technology", University Linz, Master Thesis, 2023
References
[1] C. H. Chan, Y. Zhu, S. W. Sin, S. P. U, R. P. Martins and F. Maloberti, "A 5-Bit 1.25-GS/s 4x-Capacitive-Folding Flash ADC in 65-nm CMOS," in IEEE Journal of Solid-State Circuits, vol. 48, no. 9, pp. 2154-2169, Sept. 2013.[2] Behzad Razavi, "Folding and Interpolating ADCs", UCLA
[3] Behzad Razavi, "Folding and Interpolating ADCs", Berkley, 2010
[4] A 700 µW 1GS/s 4-bit Folding-Flash ADC in 65nm CMOS for Wideband Wireless Communications, Nasri,
[5] M.D. Scott,B.E. Boser, K.S.J. Pister, "An ultralow energy ADC for Smart Dust, IEEE J. Solid-State Circuits, pp. 1123-1129, July 2003
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10 Pipeline ADC