Vollrath, Jörg Prof. Dr.-Ing.

Open Topics for scientific projects

1. A Web based FFT playground
   

   A Web based FFT playground A web page to do FFT is available for ADCs and DACs. The FFT playground should make it possible to investigate changing input signals (sine, square, sawtooth, triangle, AM, FM modulation) and FFT parameters (Number of point, sampling time) in a webpage. It is a project using HTML and JavaScript.

2. Operational amplifier investigation
   

   Operational amplifier investigation Using LTSPICE an operational amplifier is built. A test suite is developed to be able to measure data sheet parameters: IDD, A0, slew rate, ft, CMM input range, CMRR, VDDRR and output range. Investigations of transistor sizing and data sheet parameters are done.

3. Switched capacitor circuits
   

   Switched capacitor circuits A low pass circuit should be built and simulated using LTSPICE using RC circuit, SC circuit and a digital filter. Complex transfer function, H(z) and digital filter coefficients should be matched.

4. ESP8266, Arduino, Node MCU oscilloscop

   With an ESP8266 kit realize a web oscilloscope interface for the 1 channel ADC and a 4 channel SPI ADC extension board. Starting point: NodeMCU und ESP8266 - Einstieg in die Programmierung

Ongoing Activities

1. Raspberry Pi, StereoPi 3D video and depth map

   WS2020, Patil, Madhu With the StereoPi kit a 3D video for Cardboard or beamer and a depth map should be taken. Web page Crowd Supply Crowd funding platform, Web page StereoPi

Veröffentlichungen

1. Jörg Vollrath, Open Access Microelectronics Course, European Workshop on Microelectronics Education, Braunschweig, 2018
   IEEEExplore abstract, Publication , Presentation
   

   Open Access Microelectronics Course A master level class Microelectronics is presented with the accompanying web page, tools usage of LTSPICE, Electric and ISE Webpack for design of a UART. It enables open access to an example of chip design.

2. Martin Knauer, Jörg Vollrath, 'Implementation and Testing of a FPGA Based Sigma Delta Analog to Digital Converter', MPC Workshop, Reutlingen July 2017
   MPC Workshop Bände, Publication
   
   

   Implementation and Testing of a FPGA Based Sigma Delta Analog to Digital Converter In this work a 10-bit sigma-delta analog to digital converter was implemented using only a NEXYS 3 FPGA board in combination with some passive components. INL and DNL was measured for both devices. The overall setup revealed a SNR of 33.8 dB with an ENOB of 5.3 bits.

3. Jörg Vollrath, Teaching Advanced A/D Converters using Online Simulation and Measurements
   Publication
   
4. J. Vollrath, An Open Access Minimum Automatic Task Generation Live Feedback System for Electrical Engineering, EDUCON 2015, Tallin, (2018, 37 full text views)
   IEEEExplore abstract, Publication
5. J. Vollrath, Interactive Tools for Teaching Electrical Engineering, EDUCON, Istanbul, 2014, (2018, 108 full text views)
6. J. Vollrath, Using Models, Simulation and Measurements for Teaching Circuit Design, EDUCON, Berlin, 2013, (2018, 144 full text views)
7. R. Thewes, J. Vollrath, et.al., Matching Behavior of Analog FDSOI n-MOS-Transistors Under Large Backgate Voltage Swing Operating Conditions, SOI Conference, 2013, (2018, 94 full text views, 1 citation)
8. J. Vollrath, Memory Test and Diagnosis using Automated Pattern Generation, IEEE Electronic Proceedings of the European Test Symposium (ETS), Sevilla, 2009,
9. J. Vollrath, Marcin Gnat, Efficient DRAM Characterization Using Improved Searches, Branching and Automated Pattern Generation, IEEE Electronic Proceedings of the International Workshop om memory technology, Design, and Testing (MTDT), Hsinchu, Taiwan 2009, (2018 76 full text views, 1 citation)
10. J. Vollrath, Automatic Pattern Generator for DRAM Memories, IEEE Proceedings of the International Design and Test Workshop (IDT), Dubai, United Arab Emirates, 2006
11. J. Vollrath, et al., DDR2 DRAM Output Timing Optimization, IEEE Proceedings of the Memory Technology, Design and Test Workshop (MTDT), Taipei, Taiwan, 2006, (2018 119 full text views, 3 citation)
12. Z. Al-Ars, J. Vollrath, et al., DRAM-Specific Space of Memory Tests, IEEE Proceedings of the International Test Conference, Santa Clara, USA, 2006, (2018, 258 full text views, 4 citations)
13. Z. Al-Ars, J. Vollrath, S. Hamdioui, Investigations of faulty DRAM behavior using electrical simulation versus an analytical approach, IEEE Proceedings of the Asian Test Symposium, Kolkata, India, 2005, (2018, 22 full text views, 1 citation)
14. J. Vollrath, Output Timing Measurement Using an Idd Method, IEEE Pro-ceedings of the Memory Technology, Design and Test Workshop, San Jose, 2003, (2018, 50 full text views)
15. J. Vollrath, Testing and Characterization of SDRAMs, IEEE Design & Test, vol.20, no. 1, January-February 2003, (2018 75 full text views, 2 citation)
    IEEEExplore abstract, Publication
16. J. Vollrath, Signal Margin Analysis for DRAM Sense Amplifiers, IEEE Proceedings of the DELTA, New Zealand, 2002, (2018, 583 full text views, 9 citations)
    IEEEExplore abstract, Publication
17. J. Vollrath, U. Lederer, T. Hladschik, Compressed Bit Fail Maps for Memory Fail Pattern Classification, JETTA, Vol. 17, No. 3-4, Kluwer Academic Publishers, 2001
18. J. Vollrath, R. Rooney, Pseudo Fail Bit Map Generation for RAMs during Component Test and Burn-In in a Manufacturing Environment, Proceedings of the International Test Conference (ITC), Baltimore, MD, 2001, (2018, 49 full text views)
19. J. Vollrath, Evaluation of University Semiconductor Knowledge in a DRAM Manufacturing Environment, IEEE Proceedings of the IEEE/EDS University Government Industry Microelectronics (UGIM) Symposium, Richmond, VA, 2001, (2018 18 full text views)
20. J. Vollrath, Tutorial: Synchronous Dynamic Memory Test construction: A Field Approach, IEEE Proceedings of the Memory Technology, Design and Test Workshop (MTDT), San Jose, 2000, (2018 55 full text views, 12 citation)
21. J. Vollrath, U. Lederer, T. Hladschik, Compressed Bit Fail Maps for Memory Fail Pattern Classification, IEEE Proceedings of the European Test Workshop (ETW 2000), Lissabon, 2000, (2018, 94 full text views, 10 Citations)
22. J. Vollrath, Tutorial: SDRAM Characterization, IEEE Proceedings of the Memory Technology, Design and Test Workshop, San Jose, 1999
23. J. Vollrath, M. Huebl, E. Stahl, Power Analysis of DRAMs, IEEE Proceedings of the Seventh Asian Test Symposium (ATS), Singapur, 1998, (2018, 45 full text views, 3 citation)
24. J. Vollrath, Cell signal measurement for High density DRAMs, Proceedings of the International Test Conference (ITC), Washington DC, 1997, (2018, 24 full text views, 6 Citations)
    
25. J. Vollrath, CMOS-kompatible Tieftemperatur- JFETs, Fortschr.-Ber. VDI Reihe 9, Nr. 198. Düsseldorf, VDI Verlag, 1994
26. J. Vollrath, Low Temperature CMOS compatible JFET's, Journal de Physique IV, 1994
27. J. Vollrath, W. Langheinrich, A CMOS compatible JFET Technology for Op-eration down to 4.2 K, Proceedings of the Symposium on Low Temperature Electronics and High Temperature Superconductivity, 183rd Meeting of the Electrochemical Society, Honolulu, Hawaii, Proceedings of ECS, 93--22, 1993
28. D.K. Thakur, A. Kumar, J. Vollrath, W .Langheinrich et. al., Darlington and Parallel Operations in Monolithically Integrated BIMOS Transistor Chip, IEEE Industrial Application Society Annual Meeting, Toronto, 1993, (2018, 28 full text views, 1 citation)
29. H. Acker, S. Schwehr, M. Hauck, T. Persch und J. Vollrath, A Four Channel, Input-Level-Tunable Data Acquisition Chip, Realized with an Analog/Digital Array for Research and Education, Proceedings EuroAsic '92 conf., Paris, IEEE, 1992
30. J. Vollrath, O. Zucker, W. Langheinrich, On-Chip Sensorstrukturen zur Bestimmung der Temperaturverteilung auf Kryoschaltkreisen, Temperatur 92, GME-Fachtagung Düsseldorf, VDI Berichte 982, VDI-Verlag, 1992
31. J. Vollrath, W. Langheinrich, Implantierte Kanalwiderstände von JFETs zwischen Raumtemperatur und 4 K, DPG-Tagung, Regensburg, Verhandlungen der DPG (VI) 27,1992
32. W. Langheinrich, O. Kindl, S. Schwehr, J. Vollrath, Silicon Devices at LHe-Temperatures, Proceedings 6th Int. Workshop on Physics of Semiconductor Devices, New Delhi, Tata McGraw Hill, 1991

Betreute Arbeiten

1. Shakeel, Saqib, Parking lot control with a RaspberryPi using AI and image processing, ongoing
2. Islam, Mir Humainul, Analysis and Optimization of a FT-IR Emission Measurement System for Low Pressure Application, ongoing
3. Pourramezan, Mohammad Mehdi, CMOS Pipeline ADC Architecture Investigation, 2019
4. Bashir, Abubakar, Wash Program Configurator Using Angular, 2019
5. Ritzl,Andreas Paul, Redesign of a highly precise data acquisition system for firing airbags and pretensioners, Master Thesis, 2018
6. Ding,Xiaomeng, Design and Implementation of a Smart Fenceless Robotic Workspace, Master Thesis, 2018
7. Rubalcava, Mendez Carlos Enrique, Development of a Software Framework based on NI-LabVIEW technology for testing equipment, 2018
8. Bahri,Amina, Prototype Industrial Ethernet Temperature transmitter with PROFINET Interface, Master Thesis, 2018
9. Gonzalez Ramirez,Mar, An IoT curve tracer using the Raspberry Pi, Master Thesis, 2017
10. Nguyen,Duc Minh, Design and measurement of a 2nd order Sigma Delta ADC, Master Thesis, 2017
11. Masum,Abdullah Al, Design and Performance Analysis of a 16Bit 200MS/s Pipeline ADC in 50 nm Technology, Master Thesis, 2017
12. Weiss,Manuel, Smart Home - Integrierung von ESERA 1-Wire Controller in FHEM, Bachelorarbeit, 2017
13. Prinz,Martin Georg, Erprobung anisotrop elektrisch leitfähiger Klebefilme unter den Einsatzbedingungen im Automobilbereich, Bachelorarbeit, 2016
14. Tutus,Emre, Analyse und Einführung der industriellen Bildverarbeitung in der Prüfautomatisierung, Diplomarbeit, 2016
15. Kraus,David, Entwicklung, Programmierung und Inbetriebnahme eines Smartphone-Ladeautomaten, Bachelorarbeit, 2016
16. Schweiger,Moritz, Entwicklung eines Algorithmus zur Prognose der Verletzungsschwere von Fahrzeuginsassen basierend auf Neuronalen Netzen, Bachelorarbeit, 2016
17. Beer,Matthias Robert, Automatische Anbindung von Simulink-Anwendungen an ein Prozessabbild per Code-Generierung, Bachelorarbeit, 2016
18. Wolter,Alexander, Programmierung und Visualisierung einer Ultrahocherhitzungsanlage in der Software Simatic Manager und dem TIA Portal, Bachelorarbeit, 2016
19. Schirmer,Alessandro, Development of a switching power supply for aerospace applications, Bachelorarbeit, 2014
20. Haq,Ashraful, Control of Production Line Demonstrator with an FPGA, Master Thesis, 2014
21. Aslam,Sarmad, Energy Harvesting System Modeling, Master Thesis, 2013
22. Doster,Steffen, Prozesssichere Hochgeschwindigkeits-Datenübertragung für Druckdaten einer industriellen Anwendung, Diplomarbeit, 2013
23. Deubzer,Andrea, Spezifikation, Entwicklung und Inbetriebnahme eines FMC- Moduls, Diplomarbeit, 2013
24. Edisherashvili,Yaako, All digital AD/DA converter on an FPGA, Master Thesis, 2013
25. Demirci,Deniz, Design of a Memory Test Core in VHDL, Master Thesis, 2013
26. Katanguri,Vedaprakas, Modelling, Validation and Optimization of Controllers for Thermal Energy Systems, Master Thesis, 2013
27. Lehle,Peter, Evaluierung von PREEvision im Rahmen einer modellbasierten Entwicklung von E/E-Fahrzeugarchitekturen, Diplomarbeit, 2013
28. Betancourt Garzon,Ed, Improved Error Handling Collecting and Analysing Sensor Data, Master Thesis, 2012
29. Boeck,Holger Karl, Design of a power RF/DC Converter for reliability tests, Master Thesis, 2011

Scientific projects

1. Corredor, A Jupyter Notebook on Red Pitaya: LED control and FPGA design, 2020
   

   Corredor A Jupyter Notebook on Red Pitaya: LED control and FPGA design 2020 A redpitaya is an open source multifunctional laboratory instrument which contains an FPGA and ARM processor, ADC, DAC and LEDs. This project realizes user applications either using the available "default" design configuration with phyton and node.js or changing the FPGA design.

2. Hossain, A Web-interface for a Sense HAT for Raspberry Pi, 2020
   

   Hossain A Web-interface for a Sense HAT for Raspberry Pi 2020 The main goal of this scientific project is to run a Node.js server on Raspberry Pi and to control the LED matrix of the Sense HAT by a webpage. And at the same time, calibrate the color of LEDs of the Sense HAT.

3. Islam, WiFi Based Radio with Alarm Clock Using ESP8266,2020
4. Khan, Raheel Ahmad, High resolution sine wave generation using Javascript, 2019
5. Khan, Abdul Kaium, Control robotic arm with raspberryPi, 2019
6. Bashir, A UART Web interface for the Raspberry Pi, 2019
7. Nawaz, RaspberryPI LogiPI web interface, 2019
8. Bell, High Level Simulation of a 2-2 MASH Sigma Delta Analogue to Digital Converter, 2018
9. Kim, Jihoon, Digital Sine Signal, 2018
10. Andreas Ritzl , Measurement and Improvement of a Pipeline Analog-Digital-Converter, 2017
11. Andreas Greif, Design of a Raspberry Pi analog digital expansion board, 2017
12. Basto Gonzales , Stereo Video Data Acquisition and Display with a VMODCAM Module and a NEXYS3 FPGA Board using VHDL, 2017
13. Duc Minh Nguyen, Investigate ENOB of pipeline ADC, 2015
14. Francisco José Iñiguez Belando, Implementation of the soft-core OpenRisc1200 in an FPGA, 2011
15. Kisa, Volkan, Modifying the Electric Standard Cell Library, to get a Layout from a Schematic by using the Silicon Compiler, 2011
16. Vedaprakash Reddy, Analysis and Modeling of a Crank radio, 2012
17. Kirit Rao Soanker, Islam, Md. Mofakkharul, Design and Analysis of a crank lamp, 2011